| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| 74LCX112CW | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | - | - | - | - | 77 K |
| 74LCX112MTC | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | TSSOP | 16 | - | - | 77 K |
| 74LVX112M | Low Voltage Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | SOIC | 16 | - | - | 57 K |
| 74LVX112MTC | Low Voltage Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | TSSOP | 16 | - | - | 57 K |
| 74LVX112MTCX | Low Voltage Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | TSSOP | 16 | - | - | 57 K |
| 74LVX112MTCX | Low Voltage Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | TSSOP | 16 | - | - | 57 K |
| 74LVX112MX | Low Voltage Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | SOIC | 16 | - | - | 57 K |
| 74LVX112SJ | Low Voltage Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | SOIC | 16 | - | - | 57 K |
| 74LVX112SJX | Low Voltage Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | SOIC | 16 | - | - | 57 K |
| 74VHC112MX | Dual J-K Flip-Flops with Preset and Clear | Fairchild-Semiconductor | SOIC | 16 | - | - | 70 K |
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