| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| IS41C44002-50J | 5V 4M x 4(16-MBIT) dynamic RAM with edo page mode | distributor | SOJ | 24 | 0°C | 70°C | 157 K |
| IS41C44002-50JI | 5V 4M x 4(16-MBIT) dynamic RAM with edo page mode | distributor | SOJ | 24 | -40°C | 85°C | 157 K |
| IS41C44052-50J | 5V 4M x 4(16-MBIT) dynamic RAM with fast page mode | distributor | SOJ | 24 | 0°C | 70°C | 137 K |
| IS41LV44002-50J | 3.3V 4M x 4(16-MBIT) dynamic RAM with edo page mode | distributor | SOJ | 24 | 0°C | 70°C | 157 K |
| IS41LV44002-50JI | 3.3V 4M x 4(16-MBIT) dynamic RAM with edo page mode | distributor | SOJ | 24 | -40°C | 85°C | 157 K |
| IS41LV44052-50J | 3.3V 4M x 4(16-MBIT) dynamic RAM with fast page mode | distributor | SOJ | 24 | 0°C | 70°C | 137 K |
| M5-320/192-5AC | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | BGA | 256 | 0°C | 70°C | 1 M |
| M5-384/192-5AC | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | BGA | 256 | 0°C | 70°C | 1 M |
| M5-512/192-5AC | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | BGA | 256 | 0°C | 70°C | 1 M |
| PI6C39912-5J | 3.3V high speed LVTTL or balanced output programmable skew clock buffer | distributor | PLCC | 32 | 0°C | 70°C | 492 K |
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