| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| QL3025-0PQ208M | 25,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3025-1PQ208M | 25,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3025-2PQ208M | 25,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3040-0PQ208M | 40,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3040-1PQ208M | 40,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3040-2PQ208M | 40,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3060-0PQ208M | 60,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3060-1PQ208M | 60,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL3060-2PQ208M | 60,000 usable PLD gate pASIC3 FPGA combining high performance and high density. | distributor | PQFP | 208 | -55°C | 125°C | 239 K |
| QL4036-0PQ208M | 90,000 usable PLD gate QuickRAM combining performance, density and embedded RAM. 16,128 RAM bits. | distributor | PQFP | 208 | -55°C | 125°C | 599 K |
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