| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| DM74LS73ACW | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs | Fairchild-Semiconductor | - | - | - | - | 53 K |
| DM74LS73AM | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 53 K |
| DM74LS73AN | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs | Fairchild-Semiconductor | MDIP | 14 | - | - | 53 K |
| DM74LS74AM | Dual Positive-Edge-Triggered D Flip-Flop with Preset Clear and Complementrary Outputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 67 K |
| DM74LS74AMX | Dual Positive-Edge-Triggered D Flip-Flop with Preset Clear and Complementrary Outputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 67 K |
| DM74LS74ASJ | Dual Positive-Edge-Triggered D Flip-Flop with Preset Clear and Complementrary Outputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 67 K |
| SN74LS748N | 10-Line-to-4-Line and 8-Line-to-3-Line Priority Encoders | ON-Semiconductor | - | - | - | - | 134 K |
| SN74LS74AN | Dual D-Type Positive Edge-Triggered Flip-Flop | ON-Semiconductor | PDIP | 14 | - | - | 102 K |
| SN74LS76AD | Dual JK Flip-Flop with Set and Clear | ON-Semiconductor | SOIC | 16 | - | - | 93 K |
| SN74LS76AN | Dual JK Flip-Flop with Set and Clear | ON-Semiconductor | PDIP | 16 | - | - | 93 K |
| [1] [2] [3] 4 [5] [6] [7] |
|---|
