| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| AS7C34098-20TC | 3.3V 256K x 16 CMOS SRAM, access time 20ns | Alliance-Semiconductor-Corporation | TSOPII | 44 | 0°C | 70°C | 139 K |
| AS7C34098-20TI | 3.3V 256K x 16 CMOS SRAM, access time 20ns | Alliance-Semiconductor-Corporation | TSOPII | 44 | -40°C | 85°C | 139 K |
| AS7C4098-20TC | 5V 256K x 16 CMOS SRAM, access time 20ns | Alliance-Semiconductor-Corporation | TSOPII | 44 | 0°C | 70°C | 139 K |
| AS7C4098-20TI | 5V 256K x 16 CMOS SRAM, access time 20ns | Alliance-Semiconductor-Corporation | TSOPII | 44 | -40°C | 85°C | 139 K |
| M5-128/68-20VI | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | TQFP | 100 | -40°C | 85°C | 1 M |
| M5-128/68-20VI | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | TQFP | 100 | -40°C | 85°C | 1 M |
| M5-128/68-20YI | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | PQFP | 100 | -40°C | 85°C | 1 M |
| M5-192/68-20YI | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | PQFP | 100 | -40°C | 85°C | 1 M |
| M5-256/68-20YI | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | PQFP | 100 | -40°C | 85°C | 1 M |
| S80L58-20 | CHMOS single-chip 8-bit microcontroller. 3.5 MHz to 20 MHz, 2.7 V to 3.6 V, ROM version 32 Kbytes, RAM 256 bytes | Intel-Corporation | QFP | 44 | 0°C | 70°C | 284 K |
| << [21] [22] [23] [24] [25] 26 [27] [28] [29] [30] [31] >> |
|---|
