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Electronic component:Description:Manuf.PackagePinsT°minT°maxDatasheet
CD54HCT75F3A HIGH SPEED CMOS LOGIC DUAL 2-BIT BISTABLE TRANSPARENT LATCHTexas-InstrumentsJ14-55°C125°C56 K
CD74HCT7046AE HIGH SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO AND LOCK DETECTORTexas-InstrumentsN16-55°C125°C127 K
CD74HCT7046AM HIGH SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO AND LOCK DETECTORTexas-InstrumentsD16-55°C125°C127 K
CD74HCT73E HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESETTexas-InstrumentsN14-55°C125°C57 K
CD74HCT73E HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESETTexas-InstrumentsN14-55°C125°C57 K
CD74HCT73E HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESETTexas-InstrumentsN14-55°C125°C57 K
CD74HCT73M HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESETTexas-InstrumentsD14-55°C125°C57 K
CD74HCT73M HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH RESETTexas-InstrumentsD14-55°C125°C57 K
CD74HCT75E HIGH SPEED CMOS LOGIC DUAL 2-BIT BISTABLE TRANSPARENT LATCHTexas-InstrumentsN16-55°C125°C56 K
SN74HCT74PWR DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESETTexas-InstrumentsPW14-40°C85°C101 K
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