| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| IN74HC03AD | Quad 2-input NAND gate with open-drain outputs high-performance silicon-gate CMOS | distributor | SOIC | 14 | -55°C | 125°C | 72 K |
| IN74HC03AD | Quad 2-input NAND gate with open-drain outputs high-performance silicon-gate CMOS | distributor | SOIC | 14 | -55°C | 125°C | 72 K |
| IN74HC04AD | Hex inverter, high-performance silicon-gate CMOS | distributor | SOIC | 14 | -55°C | 125°C | 70 K |
| IN74HC04AN | Hex inverter, high-performance silicon-gate CMOS | distributor | Plastic DIP | 14 | -55°C | 125°C | 70 K |
| IN74HC109D | Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS | distributor | SOIC | 16 | -55°C | 125°C | 104 K |
| IN74HC109N | Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS | distributor | Plastic DIP | 16 | -55°C | 125°C | 104 K |
| IN74HC10D | Triple 3-input NAND gate, high-performance silicon-gate CMOS | distributor | SOIC | 14 | -55°C | 125°C | 70 K |
| IN74HC10N | Triple 3-input NAND gate, high-performance silicon-gate CMOS | distributor | Plastic DIP | 14 | -55°C | 125°C | 70 K |
| IN74HC112D | Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS | distributor | SOIC | 16 | -55°C | 125°C | 101 K |
| IN74HC112N | Dual J-K flip-flop with set and reset, high-performance silicon-gate CMOS | distributor | Plastic DIP | 16 | -55°C | 125°C | 101 K |
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