| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| DM74LS109AMX | Dual Positive Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs | Fairchild-Semiconductor | SOIC | 16 | - | - | 52 K |
| DM74LS109AN | Dual Positive Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs | Fairchild-Semiconductor | MDIP | 16 | - | - | 52 K |
| SN54LS107AJ | Dual JK negative edge-triggered flip-flop | Motorola | DIP | 14 | -55°C | 125°C | 128 K |
| SN54LS109AJ | Dual JK negative edge-triggered flip-flop | Motorola | PDIP | 16 | -55°C | 125°C | 147 K |
| SN54LS10J | Triple 3-input NAND gate | Motorola | DIP | 14 | -55°C | 125°C | 118 K |
| SN74LS107AD | Dual JK negative edge-triggered flip-flop | Motorola | SOIC | 14 | 0°C | 70°C | 128 K |
| SN74LS107AN | Dual JK negative edge-triggered flip-flop | Motorola | PDIP | 14 | 0°C | 70°C | 128 K |
| SN74LS109AD | Dual JK negative edge-triggered flip-flop | Motorola | SOIC | 16 | 0°C | 70°C | 147 K |
| SN74LS109AN | Dual JK negative edge-triggered flip-flop | Motorola | PDIP | 16 | 0°C | 70°C | 147 K |
| SN74LS10D | Triple 3-input NAND gate | Motorola | SOIC | 14 | 0°C | 70°C | 118 K |
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