| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| DM74LS74ACW | Dual Positive-Edge-Triggered D Flip-Flop with Preset Clear and Complementrary Outputs | Fairchild-Semiconductor | - | - | - | - | 67 K |
| DM74LS74AN | Dual Positive-Edge-Triggered D Flip-Flop with Preset Clear and Complementrary Outputs | Fairchild-Semiconductor | MDIP | 14 | - | - | 67 K |
| DM74LS74ASJ | Dual Positive-Edge-Triggered D Flip-Flop with Preset Clear and Complementrary Outputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 67 K |
| DM74LS74ASJX | Dual Positive-Edge-Triggered D Flip-Flop with Preset Clear and Complementrary Outputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 67 K |
| SN54LS748J | 10-line-to-4-line and 8-line-to-3-line priority encoder | Motorola | DIP | 16 | -55°C | 125°C | 231 K |
| SN54LS74AJ | Dual D-type positive edge-triggered flip-flop | Motorola | DIP | 14 | -55°C | 125°C | 73 K |
| SN74LS748D | 10-line-to-4-line and 8-line-to-3-line priority encoder | Motorola | SOIC | 16 | 0°C | 70°C | 231 K |
| SN74LS748N | 10-line-to-4-line and 8-line-to-3-line priority encoder | Motorola | PDIP | 16 | 0°C | 70°C | 231 K |
| SN74LS74AD | Dual D-type positive edge-triggered flip-flop | Motorola | SOIC | 14 | 0°C | 70°C | 73 K |
| SN74LS74AN | Dual D-type positive edge-triggered flip-flop | Motorola | PDIP | 14 | 0°C | 70°C | 73 K |
| [1] [2] [3] [4] [5] [6] 7 [8] |
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