| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| 28LV256JC-3 | Speed: 200 ns, Low voltage CMOS 256 K electrically erasable programmable ROM 32K x 8 BIT EEPROM | distributor | PLCC | 32 | 0°C | 70°C | 41 K |
| 28LV256JC-4 | Speed: 250 ns, Low voltage CMOS 256 K electrically erasable programmable ROM 32K x 8 BIT EEPROM | distributor | PLCC | 32 | 0°C | 70°C | 41 K |
| 28LV256JC-5 | Speed: 300 ns, Low voltage CMOS 256 K electrically erasable programmable ROM 32K x 8 BIT EEPROM | distributor | PLCC | 32 | 0°C | 70°C | 41 K |
| 28LV256JC-6 | Speed: 400 ns, Low voltage CMOS 256 K electrically erasable programmable ROM 32K x 8 BIT EEPROM | distributor | PLCC | 32 | 0°C | 70°C | 41 K |
| 28LV256JI-3 | Speed: 200 ns, Low voltage CMOS 256 K electrically erasable programmable ROM 32K x 8 BIT EEPROM | distributor | PLCC | 32 | -40°C | 85°C | 41 K |
| 28LV256JI-5 | Speed: 300 ns, Low voltage CMOS 256 K electrically erasable programmable ROM 32K x 8 BIT EEPROM | distributor | PLCC | 32 | -40°C | 85°C | 41 K |
| 28LV256JI-6 | Speed: 400 ns, Low voltage CMOS 256 K electrically erasable programmable ROM 32K x 8 BIT EEPROM | distributor | PLCC | 32 | -40°C | 85°C | 41 K |
| MACHLV210-18JI | High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 18ns | Lattice-Semiconductor-Corporation | PLCC | 44 | -40°C | 85°C | 221 K |
| MACHLV210-20JC | High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 20ns | Lattice-Semiconductor-Corporation | PLCC | 44 | 0°C | 70°C | 221 K |
| MACHLV210-24JI | High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 24ns | Lattice-Semiconductor-Corporation | PLCC | 44 | -40°C | 85°C | 221 K |
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