| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| DM74LS645N | Octal 3-STATE Bus Transceiver | Fairchild-Semiconductor | MDIP | 20 | - | - | 52 K |
| DM74LS645WM | Octal 3-STATE Bus Transceiver | Fairchild-Semiconductor | SOIC | 20 | - | - | 52 K |
| DM74LS645WMX | Octal 3-STATE Bus Transceiver | Fairchild-Semiconductor | SOIC | 20 | - | - | 52 K |
| DM74LS670CW | 3-STATE 4-by-4 Register File | Fairchild-Semiconductor | - | - | - | - | 65 K |
| DM74LS670M | 3-STATE 4-by-4 Register File | Fairchild-Semiconductor | SOIC | 16 | - | - | 65 K |
| DM74LS670MX | 3-STATE 4-by-4 Register File | Fairchild-Semiconductor | SOIC | 16 | - | - | 65 K |
| DM74LS670N | 3-STATE 4-by-4 Register File | Fairchild-Semiconductor | MDIP | 16 | - | - | 65 K |
| DM74LS73ACW | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs | Fairchild-Semiconductor | - | - | - | - | 53 K |
| DM74LS73AM | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 53 K |
| DM74LS73AN | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs | Fairchild-Semiconductor | MDIP | 14 | - | - | 53 K |
| << [27] [28] [29] [30] [31] 32 [33] [34] [35] [36] |
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