Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
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SN74LS73AD | Dual JK negative edge-triggered flip-flop | Motorola | SOIC | 14 | 0°C | 70°C | 73 K |
SN74LS73AN | Dual JK negative edge-triggered flip-flop | Motorola | PDIP | 14 | 0°C | 70°C | 73 K |
SN74LS74AD | Dual D-type positive edge-triggered flip-flop | Motorola | SOIC | 14 | 0°C | 70°C | 73 K |
SN74LS74AN | Dual D-type positive edge-triggered flip-flop | Motorola | PDIP | 14 | 0°C | 70°C | 73 K |
SN74LS75AN | 4-bit latch | Motorola | PDIP | 14 | 0°C | 70°C | 98 K |
SN74LS76AD | Dual JK flip-flop with set and clear | Motorola | SOIC | 16 | 0°C | 70°C | 63 K |
SN74LS76AN | Dual JK flip-flop with set and clear | Motorola | PDIP | 16 | 0°C | 70°C | 63 K |
SN74LS76AN | Dual JK flip-flop with set and clear | Motorola | PDIP | 16 | 0°C | 70°C | 63 K |
SN74LS77AD | 4-bit latch | Motorola | SOIC | 14 | 0°C | 70°C | 98 K |
SN74LS77AN | 4-bit latch | Motorola | PDIP | 14 | 0°C | 70°C | 98 K |
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