| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| 74LCX112CW | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | - | - | - | - | 77 K |
| 74LCX112M | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | SOIC | 16 | - | - | 77 K |
| 74LCX112MTC | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | TSSOP | 16 | - | - | 77 K |
| 74LCX112MTCX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | TSSOP | 16 | - | - | 77 K |
| 74LCX112MX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | SOIC | 16 | - | - | 77 K |
| 74LCX112SJ | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | SOIC | 16 | - | - | 77 K |
| 74LCX112SJX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Fairchild-Semiconductor | SOIC | 16 | - | - | 77 K |
| 74LCX11CW | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild-Semiconductor | - | - | - | - | 83 K |
| 74LCX11MTC | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild-Semiconductor | TSSOP | 14 | - | - | 83 K |
| 74LCX11SJX | Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs | Fairchild-Semiconductor | SOIC | 14 | - | - | 83 K |
| [1] [2] [3] 4 [5] [6] [7] [8] [9] [10] |
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