| Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
|---|
| MC100LVEL37DW | Low Voltage 1:4 Divide by 1/Divide by 2 ECL/PECL Clock Fanout Buffer | ON-Semiconductor | SOIC | 20 | - | - | 72 K |
| MC100LVEL37DWR2 | Low Voltage 1:4 Divide by 1/Divide by 2 ECL/PECL Clock Fanout Buffer | ON-Semiconductor | SOIC | 20 | - | - | 72 K |
| MC100LVEL38DW | Low Voltage Divide by 2, Divide by 4/6 Clock Generator Chip | ON-Semiconductor | SOIC | 20 | - | - | 128 K |
| MC100LVEL38DWR2 | Low Voltage Divide by 2, Divide by 4/6 Clock Generator Chip | ON-Semiconductor | SOIC | 20 | - | - | 128 K |
| MC100LVEL39DW | -2/4, -4/6 Clock Generation Chip | ON-Semiconductor | SOIC | 20 | - | - | 127 K |
| MC100LVEL39DWR2 | -2/4, -4/6 Clock Generation Chip | ON-Semiconductor | SOIC | 20 | - | - | 127 K |
| MC100LVEL40DW | Phase-Frequency Detector | ON-Semiconductor | SOIC | 20 | - | - | 72 K |
| MC100LVEL40DWR2 | Phase-Frequency Detector | ON-Semiconductor | SOIC | 20 | - | - | 72 K |
| MC100LVEL90DW | Triple ECL to PECL Translator | ON-Semiconductor | SOIC | 20 | - | - | 114 K |
| MC100LVEL90DWR2 | Triple ECL to PECL Translator | ON-Semiconductor | SOIC | 20 | - | - | 114 K |
| [1] [2] [3] [4] [5] 6 [7] [8] [9] [10] |
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