Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
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AS7C256-12TC | 5V 32K x 8 CM0S SRAM (common I/O), 12ns access time | Alliance-Semiconductor-Corporation | plastic TSOP | 28 | 0°C | 70°C | 133 K |
AS7C256-12TI | 5V 32K x 8 CM0S SRAM (common I/O), 12ns access time | Alliance-Semiconductor-Corporation | plastic TSOP | 28 | -40°C | 85°C | 133 K |
AS7C3256-12TC | 3.3V 32K x 8 CM0S SRAM (common I/O), 12ns access time | Alliance-Semiconductor-Corporation | plastic TSOP | 28 | 0°C | 70°C | 133 K |
AS7C3256-12TI | 3.3V 32K x 8 CM0S SRAM (common I/O), 12ns access time | Alliance-Semiconductor-Corporation | plastic TSOP | 28 | -40°C | 85°C | 133 K |
M4A3-512/256-12FAC | 12ns, 3.3V high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | BGA | 256 | 0°C | 70°C | 1 M |
M4A3-512/256-12FAC | 12ns, 3.3V high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | BGA | 256 | 0°C | 70°C | 1 M |
M4A3-512/256-12FAI | 12ns, 3.3V high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | BGA | 256 | -40°C | 85°C | 1 M |
M5-512/256-12AC | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | BGA | 256 | 0°C | 70°C | 1 M |
M5-512/256-12AI | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | BGA | 256 | -40°C | 85°C | 1 M |
M5LV-512/256-12AI | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | BGA | 256 | -40°C | 85°C | 1 M |
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