Electronic component: | Description: | Manuf. | Package | Pins | T°min | T°max | Datasheet |
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M4A3-256/160-12YI | 10ns, 3.3V high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | PQFP | 208 | -40°C | 85°C | 1 M |
M4A3-384/160-12YC | 12ns: high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | PQFP | 208 | 0°C | 70°C | 1 M |
M4A3-384/160-12YI | 12ns, 3.3V high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | PQFP | 208 | -40°C | 85°C | 1 M |
M4A3-512/160-12YC | 12ns, 3.3V high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | PQFP | 208 | 0°C | 70°C | 1 M |
M4A3-512/160-12YI | 12ns, 3.3V high performance E2 CMOS in-system programmable logic | Lattice-Semiconductor-Corporation | PQFP | 208 | -40°C | 85°C | 1 M |
M5-256/160-12YC | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | PQFP | 100 | 0°C | 70°C | 1 M |
M5-256/160-12YI | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | PQFP | 100 | -40°C | 85°C | 1 M |
M5-320/160-12HC | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) | Lattice-Semiconductor-Corporation | PQFP | 100 | 0°C | 70°C | 1 M |
MS81V06160-12TA | (401,408-word x 16-bit) FIFO memory | distributor | TSOP | 70 | 0°C | 70°C | 266 K |
MS81V10160-12TA | (664,320-word x 16-bit) FIFO memory | distributor | TSOP | 70 | 0°C | 70°C | 266 K |
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