zhouxubo
Guru
Joined: Aug 05, 2008
Posts: 117
|
 Posted: 16/08/2008 6:26 am Post subject: V62C5181024L-70TI IS62C1024L-70Q IS62C1024L-35QI PDF DATASH |
 |
|
V62C5181024L-70TI IS62C1024L-70Q IS62C1024L-35QI PDF DATASHEET
Description
The V62C5181024 is a 1,048,576-bit static random-access memory organized as 131,072 words by 8 bits. It is built with MOSEL VITELIC’s high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
Features
High-speed: 35, 70 ns Ultra low DC operating current of 5mA (max.) TTL Standby: 5 mA (Max.)
CMOS Standby: 60 m A (Max.) Fully static operation All inputs and outputs directly compatible Three state outputs Ultra low data retention current (V = 2V) CC Single 5V – 10% Power Supply |
|
