tinachen1010
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Joined: Jun 16, 2008
Posts: 77
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 Posted: 18/08/2008 3:41 am Post subject: DESCRIPTION IDT7201LA120L IDT7201LA120D IDT7201LA120DB |
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DESCRIPTION IDT7201LA120L IDT7201LA120D IDT7201LA120DB :
The IDT7200/7201/7202 are dual-port memories that load and empty data on a first-in/first-out basis. The devices use Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. The reads and writes are internally sequential through the use of ring pointers, with no address information required to
load and unload data. Data is toggled in and out of the devices through the use of the Write (W) and Read (R) pins. The devices utilizes a 9-bit wide data array to allow for control and parity bits at the user°Os option. This feature i especially useful in data communications applications where it is necessary to use a parity bit for transmission/reception error checking. It also features a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed low to allow for retransmission from the beginning of data. A Half-Full Flag is available in the single
device mode and width expansion modes. The IDT7200/7201/7202 are fabricated using IDT°Os high
speed CMOS technology. They are designed for those applications requiring asynchronous and simultaneous read/ writes in multiprocessing and rate buffer applications. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B. |
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