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Jennic tests serial RapidIO IP

Prev.: RFID reader chipset for EPC Gen 1&2Next: IBM pushes Cell beyond gaming

Jennic tests serial RapidIO IP15:23 [16/10/2006] Post by - Read: 748
Jennic tests serial RapidIO IP

  

IP core firm Jennic has demonstrated its Serial RapidIO IP operating in conjunction with solutions from other RapidIO vendors.

“Jennic has implemented the IP core as a Serial RapidIO to PCI bridge chip which has been instantiated in both an NEC Electronics ISSP structured Asic and an Altera Stratix-GX FPGA,” claimed the firm.

“Tests included passing RapidIO traffic between Jennic’s IP core and a Freescale PowerQUICC III processor, via a Serial RapidIO switch fabric composed of Tundra Semiconductor’s Tsi568A Serial RapidIO switch devices and under the control of Fabric Embedded Tools RapidFET software.”

Sheffield’s Jennic developed an integrated Serial RapidIO evaluation platform for the testing consisting of a PCI compliant hardware inter-operability platform and a software package.

www.jennic.com





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